The present invention relates, for example, to a semiconductor device having fin field effect transistors packaged thereon.
A reducing gate length resulting from the increasingly smaller size of field effect transistors (hereinafter referred to as FETs) leads to a short channel effect. The same effect causes a drain current to flow even in the absence of any source-to-drain channel. To suppress the same effect, a fin type FET (hereinafter referred to as a FinFET) has been proposed. Such FinFETs have been chiefly studied and developed for logics including memories (refer, for example, to Japanese Patent Laid-Open No. 2006-310847).